Modern consumer electronics, such as cellular phones, digital cameras, and music players, require shrinking integrated circuits and packing more integrated circuits into an ever shrinking physical space. Numerous technologies have been developed to meet these requirements. One of these technologies involves making the integrated circuits as thin as possible.
Consequently, integrated circuit wafers are fabricated to be as thin as possible with processes often referred to as thinning, backgrinding, lapping, or backlapping to name a few. Some of these processes are applied to the wafers prior to fabricating the integrated circuits on the wafers while others occur afterwards. The resultant thin wafers are prone to bowing or warpage due to many factors including the sheer thinness of the wafers.
Furthermore, the wafer warpage creates a myriad of problems from fabrication through the integration of the integrated circuits into the end consumer electronic products. One such problem is placing identifying marks on the wafers to be used for identification throughout manufacturing and through to integration into the end consumer electronics products. The warpage variations create problems for the marking systems to accurately and clearly place identifying marks on the wafer.
Numerous approaches attempting to solve the wafer warpage and marking problems exist. Some of the approaches trying to solve the wafer warpage problem require additional physical structures on the active side or back side of the wafer. Although these structures alleviate warpage, they also limit the integrated circuit size on the wafer and the yield from each wafer.
An approach to try to solve the marking problem provides a marking tape where the surface of the marking tape facing the wafer contains pigmentation, which reacts to an applied laser to leave inked identifying marks on the wafers. Although this approach utilizes a laser and a tape for wafer markings, it does not provide clear identifying marks because the identifying marks are still affected by wafer warpage.
Thus, a need still remains for compensating for the wafer warpage in ultra-thin wafers. There also remains the need for accurate marking of ultra-thin wafers. In view of the ever-increasing need to save costs and improve efficiencies, it is more and more critical that answers be found to these problems.
Solutions to these problems have been long sought but prior developments have not taught or suggested any solutions and, thus, solutions to these problems have long eluded those skilled in the art.